1. Field of the Invention
The present invention relates to a semiconductor device suitable for a semiconductor integrated circuit comprising MOSFETs (MOS field effect transistors) as its components, and more specifically to improvements in reduction in temperature rise in resistor elements while maintaining a high degree of integration.
2. Description of the Background Art
With the progress of miniaturization of semiconductor elements forming a semiconductor integrated circuit and improvements in the scale of integration of semiconductor integrated circuits, 1 Gbit dynamic memories and logic devices which can be equipped with 10 mega gates have recently been developed. It has also become possible to implement, on a single semiconductor chip, a system itself which had conventionally been built with a configuration of various kinds of LSIs (large integrated circuits) on a board held in a casing. That is the emergence of system LSIs.
In system LSIs, analog ICs and passive elements, which had conventionally been integrated on a board in the form of discrete elements, are taking on greater importance. Of the passive elements, especially resistor elements have remarkably increased in importance. However, with improvements in the scale of integration and miniaturization of resistor elements themselves, great attention is being given to the issue of heat radiation which was of no concern when the resistor elements were formed in relatively large dimensions with a low degree of integration.
As shown in the graph of FIG. 14, as the power applied to the resistor elements increases, the temperatures of the resistor elements rise because of Joule heat generated by the resistor elements. A gradient xcex8 with respect to the relationship between the temperature rise xcex94T and the applied power P is called thermal resistance. That is, the thermal resistance xcex8 can be defined by the following equation (1):
xcex94T=xcex8xc2x7Pxe2x80x83xe2x80x83(1)
A resistor element formed on a silicon substrate of high thermal conductivity has a low thermal resistance xcex8. Accordingly, a temperature rise in the resistor element formed on the silicon substrate can be minimized. However in a resistor element formed on an isolation insulating film (element isolation insulating film) which is formed on the major surface of a silicon substrate, a greater temperature rise will occur due to a high thermal resistance of the isolation insulating film generally having a thickness of approximately 200 to 400 nm.
FIGS. 15 and 16 respectively are longitudinal and plan section views of a conventional semiconductor device with a resistor element. This device 150 comprises a semiconductor substrate 51, an isolation insulating film 52, a resistor layer 53, a sidewall spacer 54, an interlayer insulation film 57, plugs 59 and 69 and interconnection layers 58 and 68. The semiconductor substrate 51 is a silicon substrate, and the isolation insulating film 52 is selectively formed on the major surface of the semiconductor substrate 51. The resistor layer 53 formed on the isolation insulating film 52 as a resistor element is made of, for example, phosphorus-doped polysilicon. The interlayer insulation film 57 covers the semiconductor substrate 51, the isolation insulating film 52, the resistor layer 53 and the insulative sidewall spacer 54. The interconnection layers 58 and 68 disposed on the interlayer insulation film 57 are made of AlCu. The interlayer insulation film 57 has through holes 75 and 76 extending therethrough which are filled respectively with the conductive plugs 57 and 69, thereby providing electrical connections between the interconnection layers 58, 68 and the resistor layer 53. Tungsten is a major constituent of the plugs 59 and 69.
The diameters of the plugs 59 and 69, in general, are approximately equal to or approximately 1.5 times greater than the design rule for the semiconductor device 150, and the plugs 59 and 69 are generally circular in transverse cross section along the major surface of the semiconductor substrate 51. However, the cross-sectional shapes of the plugs 59 and 69, at the design stage, are set to have the shape of uniform squares as shown in FIG. 16 and thereafter rounded by the proximity effect of light on a semiconductor wafer to have a circular shape.
In the resistor layer 53 shown in FIGS. 15 and 16, as above described, the temperature rises with increasing applied power, exceeding a maximum operating temperature TjMAX. The maximum operating temperature TjMAX is a maximum temperature that should not be exceeded in order to secure normal operation or reliability of the device. If the device is operated with a temperature exceeding the maximum operating temperature TjMAX, metallic atoms such as Al in the interconnection layers 58 and 68 can travel with current. This phenomenon, known as electromigration, may in some cases cause defects in the interconnection layers 58 and 68, thereby resulting in an open failure that no current flows. It may also promote degradation of a gate oxide film, thereby causing degradation in device reliability.
Conventionally, in order to prevent the temperature from exceeding the maximum operating temperature TjMAX, measures have been taken to increase an area of heat radiation while maintaining a constant resistance value by equally multiplying the width and length of the resistor layer 53. However, with the current progress to a higher level of semiconductor element miniaturization, system LSIs using a number of resistor layers cannot achieve a predetermined level of integration without reducing the area of the resistor layer 53. That is, there is a problem with the conventional semiconductor device that it cannot gain the benefit of chip cost reduction from scaling.
The present invention has been devised to solve the aforementioned conventional problems and an object thereof is to provide a semiconductor device capable of improving heat radiating characteristics without impairing miniaturization of resistor elements.
According to the present invention, the semiconductor device includes a semiconductor substrate, an isolation insulating film, a resistor layer, an interlayer insulation film, first and second interconnection layers, a first conductive plug, and a second conductive plug. The semiconductor substrate has a major surface. The isolation insulating film is selectively formed on the major surface and the resistor layer is formed on the isolation insulating film. The interlayer insulation film covers the semiconductor substrate, the isolation insulating film and the resistor layer. The first and second interconnection layers are disposed on the interlayer insulation film. The first conductive plug is selectively buried in the interlayer insulation film and has an upper end connected to the first interconnection layer and a lower end connected to one end of the resistor layer and a first portion of the major surface of the semiconductor substrate which is adjacent to the isolation insulating film. The first conductive plug is rectangular in cross section along the major surface with its long sides extending along a main direction to connect the one end and the other end of the resistor layer and its short sides extending along a direction orthogonal to the main direction. The second conductive plug is selectively buried in the interlayer insulation film and has an upper end connected to the second interconnection layer and a lower end connected to the other end of the resistor layer.
In the semiconductor device, heat generated in the resistor layer by current supplied through the first and second interconnection layers can efficiently be dissipated through the first conductive plug into the semiconductor substrate. This effectively reduces a temperature rise in the resistor layer without impairing miniaturization of the resistor layer. Besides, since the first conductive plug is rectangular in cross section with its long sides extending along the main direction of the resistor layer, a radiation path from the resistor layer to the semiconductor substrate can be secured by the first conductive plug which has stable filling properties with a reduction of a filling material.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.